Re: reg cpu

Posted by satish on May 02, 2018; 10:30am
URL: http://erman-arslan-s-oracle-forum.124.s1.nabble.com/reg-cpu-tp5844p5857.html

Thanks for the updates erman

the whole output!

[root@motonode1~]# dmidecode -t 4 | egrep -i "Designation|Intel|core|thread"
        Socket Designation: Proc 1
        Manufacturer: Intel(R) Corporation
                HTT (Multi-threading)
        Version: Intel(R) Xeon(R) CPU E5-2637 v4 @ 3.50GHz
        Core Count: 4
        Core Enabled: 4
        Thread Count: 8
                Multi-Core
                Hardware Thread
        Socket Designation: Proc 2
[root@motonode1~]# dmidecode --type 4
# dmidecode 3.0
# SMBIOS entry point at 0x788db000
Found SMBIOS entry point in EFI, reading table from /dev/mem.
SMBIOS 2.8 present.

Handle 0x0003, DMI type 4, 42 bytes
Processor Information
        Socket Designation: Proc 1
        Type: Central Processor
        Family: Xeon
        Manufacturer: Intel(R) Corporation
        ID: F1 06 04 00 FF FB EB BF
        Signature: Type 0, Family 6, Model 79, Stepping 1
        Flags:
                FPU (Floating-point unit on-chip)
                VME (Virtual mode extension)
                DE (Debugging extension)
                PSE (Page size extension)
                TSC (Time stamp counter)
                MSR (Model specific registers)
                PAE (Physical address extension)
                MCE (Machine check exception)
                CX8 (CMPXCHG8 instruction supported)
                APIC (On-chip APIC hardware supported)
                SEP (Fast system call)
                MTRR (Memory type range registers)
                PGE (Page global enable)
                MCA (Machine check architecture)
                CMOV (Conditional move instruction supported)
                PAT (Page attribute table)
                PSE-36 (36-bit page size extension)
                CLFSH (CLFLUSH instruction supported)
                DS (Debug store)
                ACPI (ACPI supported)
                MMX (MMX technology supported)
                FXSR (FXSAVE and FXSTOR instructions supported)
                SSE (Streaming SIMD extensions)
                SSE2 (Streaming SIMD extensions 2)
                SS (Self-snoop)
                HTT (Multi-threading)
                TM (Thermal monitor supported)
                PBE (Pending break enabled)
        Version: Intel(R) Xeon(R) CPU E5-2637 v4 @ 3.50GHz
        Voltage: 1.8 V
        External Clock: 100 MHz
        Max Speed: 4000 MHz
        Current Speed: 3500 MHz
        Status: Populated, Enabled
        Upgrade: Socket LGA2011-3
        L1 Cache Handle: 0x0000
        L2 Cache Handle: 0x0001
        L3 Cache Handle: 0x0002
        Serial Number: Not Specified
        Asset Tag: UNKNOWN
        Part Number: Not Specified
        Core Count: 4
        Core Enabled: 4
        Thread Count: 8
        Characteristics:
                64-bit capable
                Multi-Core
                Hardware Thread
                Execute Protection
                Enhanced Virtualization
                Power/Performance Control

Handle 0x0004, DMI type 4, 42 bytes
Processor Information
        Socket Designation: Proc 2
        Type: Central Processor
        Family: <OUT OF SPEC>
        Manufacturer: Not Specified
        ID: 00 00 00 00 00 00 00 00
        Version: Not Specified
        Voltage: Unknown
        External Clock: Unknown
        Max Speed: 4000 MHz
        Current Speed: Unknown
        Status: Unpopulated
        Upgrade: Socket LGA2011-3
        L1 Cache Handle: Not Provided
        L2 Cache Handle: Not Provided
        L3 Cache Handle: Not Provided
        Serial Number: Not Specified
        Asset Tag: Not Specified
        Part Number: Not Specified
        Characteristics: None

[root@motonode1~]#